DIGITAL Semiconductor

Alpha 21264 Microprocessor

Product Brief

The Alpha 21264 microprocessor, with benchmarks over 544 SPECint2K and 658 SPECfp2K (50 SPECint95 and 100 SPECfp95), and with spectacular bandwidths over 4 GB/s for L2 cache and over 2 GB/s for memory, enables the system designer to produce the highest performance systems ranging from PC clients to enterprise servers. Systems implemented with Alpha microprocessors have been the industry's performance leaders since their introduction in 1992.

Applications

Supports Windows NT. -Microsoft has chosen Alpha as the first Windows NT 64-bit platform. -Microsoft releases Windows NT applications concurrently for Alpha and Intel systems. Runs Windows 95 and non-native Windows NT applications using the DIGITAL FX!32 binary translator. Supports DIGITAL UNIX the first 64-bit UNIX operating system.

Supports OpenVMS, VxWorks, and Linux. Optimizes visual computing (video and 3D graphics) using its powerful floating-point unit and the new Alpha motion-video instructions (MVI). -Real-time DVD authoring (MPEG2 and AC-3). Simplifies development of a single or dual Alpha 21264-based system using the 21272 core logic chipset (21272).

Benefits

System developers can deliver a 21264 solution that: -Will exceed end-user expectations in performance and Windows NT compatibility. -Provides investment protection by way of a migration path to higher speed 21264s and future generations of Alpha microprocessors. -Has multiple chip sources -- DIGITAL Semiconductor, Samsung, and Mitsubishi.

The 21264 will provide end users with a quantum leap in performance that will: -Enable real-time visual computing. -Perform instant data mining. -Implement internet commerce. -Enhance medical imaging. -Solve the most complex, large data-set problems quickly. -Aid research centers in developing solu-tions to complex problems in disciplines such as medicine and polymers.

Description

The 21264 is the third-generation 64-bit Alpha microprocessor. It includes the latest Alpha architecture enhancements, such as motion-video instructions and byte/word operations. The 21264 completely controls its optional L2 cache and provides flexible bus timing to support a wide range of L2 cache memory devices such as those listed here: Commodity 133-MHz register-to-register burst SRAMs (2+ GB/s) 250-MHz late-write SRAMs (4+ GB/s) 333-MHz dual-data clock-forwarded SRAMs (5+ GB/s)

Pipeline Operation Sequence

The 21264 is a four-way out-of-order-issue microprocessor that performs dynamic scheduling, register renaming, and speculative execution. The 21264 pipeline contains four integer execution units. Two of the integer execution units can perform memory address calculations for load and store operations. The 21264 pipeline also contains two floating-point execution units to perform add, divide, square root, and multiply functions. The 21264 pipeline stages perform the following operations: Cycle 0 - Instruction fetch using branch prediction Cycle 1 - Instruction data is transferred to the register rename map hardware Cycle 2 - Rename (map) instruction registers Cycle 3 - Issue instructions from the queues Cycle 4 - Read register file Cycle 5 - Execute integer or floating-point instructions Cycle 6 - Write integer results or access cache The bus interface unit, containing the memory and cache control units, maintains coherency between the Dcache and the optional L2 cache and main memory.

Characteristics

21264B (EV68)

	Power supply	Vss = 0.0 V, Vdd = 1.7V
	Operating temperature	Tj =100oC maximum
	Storage temperature range	-55oC to +125oC
	Power dissipation	67 W @ 833 MHz
	Package	588-pin pin grid array (PGA)
	Transistor count	15.2 million
	Process	0.18 micron CMOS six-layer metal
	Die size	Approximately 153 mm2
	Performance	SPEC CPU2000: 544 SPECint2000, 658 SPECfp2000   old SPEC CPU95: 50.0 SPECint95, 100.0 SPECfp95   @ 833Mhz, 8MB L2 cache

 

21264A (EV67)

	Power supply	Vss = 0.0 V, Vdd = 2.1V
	Operating temperature	Tj =100oC maximum
	Storage temperature range	-55oC to +125oC
	Power dissipation	90 W @ 750 MHz
	Package	588-pin pin grid array (PGA)
	Transistor count	15.2 million
	Process	0.25 micron CMOS six-layer metal
	Die size	Approximately 210 mm2
	Performance	SPEC CPU2000: 444 SPECint2000, 577 SPECfp2000   old SPEC CPU95: 40.1 SPECint95, 83.6 SPECfp95   @ 667Mhz, 8MB L2 cache

 

21264 (EV6)

	Power supply	Vss = 0.0 V, Vdd = 2.3 V
	Operating temperature	Tj =100oC maximum
	Storage temperature range	-55oC to +125oC
	Power dissipation	109 W @ 600 MHz
	Package	588-pin pin grid array (PGA)
	Transistor count	15.2 million
	Process	0.35 micron CMOS six-layer metal
	Die size	Approximately 314 mm2
	Performance	SPEC CPU2000: 313 SPECint2K, 422 SPECfp2K   old SPEC CPU95: 27.7 SPECint95, 58.7 SPECfp95   @ 500Mhz, 4MB L2 cache

See also

• VLSI Microprocessor's Digital Alpha 21264 section.
• Press release "Compaq Delivers on Commitment to 64-Bit AlphaServer, Digital UNIX, OpenVMS Platforms" from Compaq.
• Press release "Samsung Introduces Alpha 21264, World's Fastest Microprocessor -- Sets Standards for 64-bit Visual and Enterprise Computing" from Samsung.
• Press release "DIGITAL TO BREAK 1,000MHz BARRIER WITH HIGH-POWERED NEW GENERATION OF ALPHA ARCHITECTURE" from Digital.
• Digital Alpha 21264 in slide presentation of Digital's Jim Keller.
• An article "Alpha 21264 stakes off the claim - long before Merced" by Tom R. Halfhill, c't.
• An article "Digital 21264 Sets New Standard" by Linley Gwennap, MicroDesign Resources.

DIGITAL, DIGITAL FX!32, DIGITAL Semiconductor, the DIGITAL logo, OpenVMS, and the AlphaGeneration design mark are trademarks of Digital Equipment Corporation.
DIGITAL Semiconductor is a Digital Equipment Corporation business.
Intel is a registered trademark of Intel Corporation.
Linux is a registered trademark of Croce, William R. Della, Jr.
Microsoft and Windows 95 are registered trademarks, and Windows NT is a trademark of Microsoft Corporation.
Mitsubishi is a registered trademark of Mitsubishi Denki Kabushiki Kaisha.
Samsung is a trademark of Samsung Electronics America, Inc.
UNIX is a registered trademark in the United States and other countries, licensed exclusively through X/Open Company Ltd.
All other trademarks and registered trademarks are the property of their respective owners.

Copyright (C) 1999-2000 Alexei S. Pylkin, ICMMG RAS.
Copyright (C) 1998 Oleg Yu. Repin, Supercomputer Software Department RAS.
Partial Copyright (C) Digital Equipment Corporation 1997. All rights reserved.

The page last updated on 21 Nov 2000.